Field of Invention
This invention relates to protection of an integrated circuit (IC), and particularly relates to an electrostatic discharge (ESD) unit for protecting an internal circuit from damage caused by an ESD event.
Description of Related Art
During an ESD event, a large current may flow through an IC and easily cause damage. The damage may occur within the device that conducts the current, and also in devices that is subjected to a significant voltage drop due to the large current flow. In order to avoid damage due to an ESD event, an ESD unit is usually added to the IC.
Conventionally, a gate-grounded metal-oxide-semiconductor (GGMOS) device and a gate-driven protect circuit are used as an ESD unit, but they require a large area of the IC chip. In order to reduce the area of the ESD unit, the silicon-controlled rectifier (SCR), especially LDMOS-inserted SCR, is recently used.
FIG. 1 illustrates a conventional SCR for ESD. The SCR typically has a PNPN structure that includes the P+-region and the N-well at the drain side, and the P-well and the N+-region at the source side, and may be considered to include a PNP bipolar junction transistor (BJT) and a NPN BJT coupled to the PNP BJT. The ESD path of the SCR is indicated by the arrow in the figure.
However, the ESD holding current of the conventional SCR tends to be lower than the maximal latch-up current (ILU) in normal operation, so the latch-up immunity becomes worse and the leakage becomes larger. In addition, the trigger voltage needed to trigger the SCR is higher, so that the effect of preventing ESD damage is worse.